InP based HBT Integrated Circuit (IC) technologies have demonstrated great potential in high-speed digital and mixed-signal applications because of superior speed and bandwidth properties over the SiGe based HBT technology. Although C. R. Bolognesi et al, “Non-blocking collector InP/GaAs0.51Sb0.49/InP double heterojunction bipolar transistor with a staggered lined up base-collector junction”, IEEE Electron Device Letters, Vol., 20, No. 4, April, 1999, pp. 155-157 suggests that a symmetry of InP/GaAsSb/InP DHBT band structure may have the potential for integration of collector-up and emitter-up devices, present invention implements selective ion implantation technology for integration of high Ft HBT (collector-up HBTs) and high BVceo HBT (emitter-up HBTs) on same chip.
SiGe based HBT technology of various collector concentrations available on the same chip has been described in the prior art. See, for example, G. Freeman et al, “Device scaling and application trends for over 200 GHz SiGe HBTs”, 2003 Topical Meetings on Silicon Monolithic Integrated Circuits in RF Systems, pp. 6-9, Digest of papers. The SiGe based HBT technology enables high Ft to be traded for high BVceo on the same chip. However, IC designers up to now could not trade high Ft for high BVceo or vice versa on the same InP.
The ability to provide high Ft HBTs and high BVceo HBTs on the same chip is particularly useful in smart Power Amplifiers (PAs) in millimeter wave image radar. Increased power provides longer distance of operation. Smart PAs with digital electronics to control the PAs can be realized by high speed signal processes for regular logic and high BVceo (breakdown voltage) for large swing at output stage. However, presently, when high BVceo HBTs are used in logic circuits lower speed may occur as compensation due to inability to serve as high Ft HBTs in logic circuits on the same chip.
The ability to provide high Ft HBTs and high BVceo HBTs on a common chip substrate may also be useful in the front-end stage of an analog to digital (A/D) converter. Having high Ft HBTs and high BVceo HBTs on common chip substrate may provide increased dynamic range and larger input to analog converter which may be advantageous for higher signal/noise (S/N) ratio and resolution. However, A/D technologies of today cannot provide significantly higher peak-to-peak input signal than 1V with good linearity. Better dynamic range may improve this technology.
Accordingly there is a need for fabricating and integrating high Ft HBTs and high BVceo HBTs on the common non-silicon based wafer.